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Improving DFA attacks on AES with unknown and random faults.

, , , , , and . Sci. China Inf. Sci., 60 (4): 42401 (2017)

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A Dynamic-Adjusting Threshold-Voltage Scheme for FinFETs low power designs., , , , , , , and . ISCAS, page 129-132. IEEE, (2013)Design of Low-Power High-Performance FinFET Standard Cells., , , , , and . CSSP, 37 (5): 1789-1806 (2018)Employing the mixed FBB/RBB in the design of FinFET logic gates., , , , , , and . ASICON, page 1-4. IEEE, (2015)A high-efficient and accurate fault model aiming at FPGA-based AES cryptographic applications., , , , , , and . ASICON, page 1-4. IEEE, (2015)Ultra-low power dissipation of improved complementary pass-transistor adiabatic logic circuits based on FinFETs., , , , , , , and . Sci. China Inf. Sci., 57 (4): 1-13 (2014)High-Performance Noninvasive Side-Channel Attack Resistant ECC Coprocessor for GF(2m )., , , , , and . IEEE Trans. Ind. Electron., 64 (1): 727-738 (2017)Key characterization factors of accurate power modeling for FinFET circuits., , , , , and . Sci. China Inf. Sci., 58 (2): 1-13 (2015)Low Power High Performance FinFET Standard Cells Based on Mixed Back Biasing Technology., , , , , and . IEICE Trans. Electron., 99-C (8): 974-983 (2016)Ultralow-power high-speed flip-flop based on multimode FinFETs., , , , , and . Sci. China Inf. Sci., 59 (4): 042404:1-042404:11 (2016)High-speed constant-time division module for Elliptic Curve Cryptography based on GF(2m)., , , , , , and . ISCAS, page 818-821. IEEE, (2014)