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bit forwarded clock CNRZ-5-coded SerDes up to 12mm for MCM packages in 28nm CMOS.

A. Shokrollahi, D. Carnelli, J. Fox, K. Hofstra, B. Holden, A. Hormati, P. Hunt, M. Johnston, J. Keay, S. Pesenti, R. Simpson, D. Stauffer, A. Stewart, G. Surace, A. Tajalli, O. Amiri, A. Tschank, R. Ulrich, C. Walter, F. Licciardello, Y. Mogentale, and A. Singh. ISSCC, page 182-183. IEEE, (2016)

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Robert Armin

Gerhard Arminger

Peter Armin

Armin Mareske

Armin Benkert

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A technique to suppress tail current flicker noise in CMOS LC VCOs.S. Saeedi, S. Mehrmanesh, A. Tajalli, and S. Atarodi. ISCAS, IEEE, (2006)A low-power CMOS Gm-C filter for wireless receiver applications with on-chip automatic tuning system.H. Adrang, R. Lotfi, K. Mafinejhad, A. Tajalli, and S. Mehrmanesh. ISCAS, IEEE, (2006)A 1.8V 12-bit 230-MS/s pipeline ADC in 0.18μm CMOS technology.T. Liechti, A. Tajalli, O. Akgun, Z. Deniz, and Y. Leblebici. APCCAS, page 21-24. IEEE, (2008)A compact, low power, fully integrated clock frequency doubler.A. Tajalli, A. Khodaverdi, and S. Atarodi. ICECS, page 563-566. IEEE, (2003)Jitter analysis and measurement in subthreshold source-coupled differential ring oscillators.M. Shoaran, A. Tajalli, M. Alioto, and Y. Leblebici. ISCAS, page 157-160. IEEE, (2015)A Power-Efficient Clock and Data Recovery Circuit in 0.18 µm CMOS Technology for Multi-Channel Short-Haul Optical Data Communication.A. Tajalli, P. Muller, and Y. Leblebici. IEEE J. Solid State Circuits, 42 (10): 2235-2244 (2007)Subthreshold Source-Coupled Logic Circuits for Ultra-Low-Power Applications.A. Tajalli, E. Brauer, Y. Leblebici, and E. Vittoz. IEEE J. Solid State Circuits, 43 (7): 1699-1710 (2008)Design and optimization of a high PSRR CMOS bandgap voltage reference.A. Tajalli, S. Atarodi, A. Khodaverdi, and F. Esfanjani. ISCAS (1), page 45-48. IEEE, (2004)Optimal PAM Order for Wireline Communication.A. Wahid, R. Bindiganavile, and A. Tajalli. ISCAS, page 1-5. IEEE, (2021)Design Flow to Develop Wideband Inverter-Based Circuits Using C/ID Methodology.B. Jamadi, F. Ordubadi, and A. Tajalli. SMACD, page 1-4. IEEE, (2023)

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10.1 A pin-efficient 20.83Gb/s/wire 0.94pJ/bit forwarded clock CNRZ-5-coded SerDes up to 12mm for MCM packages in 28nm CMOS.

Please choose a person to relate this publication to

Robert Armin

Gerhard Arminger

Peter Armin

Armin Mareske

Armin Benkert

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Tajalli, Armin"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 10.1 A pin-efficient 20.83Gb/s/wire 0.94pJ/bit forwarded clock CNRZ-5-coded SerDes up to 12mm for MCM packages in 28nm CMOS.

Please choose a person to relate this publication to

Robert Armin

Gerhard Arminger

Peter Armin

Armin Mareske

Armin Benkert

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

10.1 A pin-efficient 20.83Gb/s/wire 0.94pJ/bit forwarded clock CNRZ-5-coded SerDes up to 12mm for MCM packages in 28nm CMOS.