( en | de | ru )

 

Disambiguation of "Wunderlich, Richard B."

Author of the publication

copydeleteadd this publication to your clipboard
A Programmable and Configurable Mixed-Mode FPAA SoC.

, , , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (6): 2253-2261 (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Richard Wunderlich

Richard B Parkinson

B Vlavianos

B Jahnke

B Schäfers

 

Other publications of authors with the same name

Programmable floating-gate techniques for CMOS inverters., , and . ISCAS (3), page 2441-2444. IEEE, (2005)Passgate Resistance Estimation based on the Compact EKV Model and Effective Mobility., , and . ISCAS, page 2765-2768. IEEE, (2009)Neuron Array With Plastic Synapses and Programmable Dendrites., , , and . IEEE Trans. Biomed. Circuits Syst., 7 (5): 631-642 (2013)A large-scale FPAA enabling adaptive floating-gate circuits., , and . MWSCAS, page 285-288. IEEE, (2013)Capacitively-Biased Floating-Gate CMOS: a New Logic Family., , and . ISCAS, page 3728-3731. IEEE, (2007)Single-Objective Path Planning for Autonomous Robots Using Reconfigurable Analog VLSI., , , and . IEEE Trans. Syst. Man Cybern. Syst., 47 (7): 1301-1314 (2017)A Learning-Enabled Neuron Array IC Based Upon Transistor Channel Models of Biological Phenomena., , , , , , and . IEEE Trans. Biomed. Circuits Syst., 7 (1): 71-81 (2013)Adaptive Floating-Gate Circuit Enabled Large-Scale FPAA., , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (11): 2307-2315 (2014)CAD synthesis tools for floating-gate SoC FPAAs., , , and . Des. Autom. Embed. Syst., 25 (3): 161-176 (2021)Three dimensional robot path planning using a field programmable analog array., , and . MWSCAS, page 246-249. IEEE, (2014)