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An Offset-Tolerant Fast-Random-Read Current-Sampling-Based Sense Amplifier for Small-Cell-Current Nonvolatile Memory.

M. Chang, S. Shen, C. Liu, C. Wu, Y. Lin, Y. King, C. Lin, H. Liao, Y. Chih, and H. Yamauchi. IEEE J. Solid State Circuits, 48 (3): 864-877 (2013)

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Jung-Hsing Lin

Peh-jung Lin

Bei-Jung Lin

Lin Lin

Other publications of authors with the same name

A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN Based AI Edge Processors.C. Xue, W. Chen, J. Liu, J. Li, W. Lin, W. Lin, J. Wang, W. Wei, T. Chang, T. Chang and 12 other author(s). ISSCC, page 388-390. IEEE, (2019)A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors.W. Chen, K. Li, W. Lin, K. Hsu, P. Li, C. Yang, C. Xue, E. Yang, Y. Chen, Y. Chang and 7 other author(s). ISSCC, page 494-496. IEEE, (2018)19.4 embedded 1Mb ReRAM in 28nm CMOS with 0.27-to-1V read using swing-sample-and-couple sense amplifier and self-boost-write-termination scheme.M. Chang, J. Wu, T. Chien, Y. Liu, T. Yang, W. Shen, Y. King, C. Lin, K. Lin, Y. Chih and 2 other author(s). ISSCC, page 332-333. IEEE, (2014)A Low-Voltage Bulk-Drain-Driven Read Scheme for Sub-0.5 V 4 Mb 65 nm Logic-Process Compatible Embedded Resistive RAM (ReRAM) Macro.M. Chang, C. Wu, C. Kuo, S. Shen, S. Yang, K. Lin, W. Shen, Y. King, C. Lin, and Y. Chih. IEEE J. Solid State Circuits, 48 (9): 2250-2259 (2013)An Offset-Tolerant Fast-Random-Read Current-Sampling-Based Sense Amplifier for Small-Cell-Current Nonvolatile Memory.M. Chang, S. Shen, C. Liu, C. Wu, Y. Lin, Y. King, C. Lin, H. Liao, Y. Chih, and H. Yamauchi. IEEE J. Solid State Circuits, 48 (3): 864-877 (2013)An offset-tolerant current-sampling-based sense amplifier for Sub-100nA-cell-current nonvolatile memory.M. Chang, S. Shen, C. Liu, C. Wu, Y. Lin, S. Wu, C. Huang, H. Lai, Y. King, C. Lin and 3 other author(s). ISSCC, page 206-208. IEEE, (2011)A 0.5V 4Mb logic-process compatible embedded resistive RAM (ReRAM) in 65nm CMOS using low-voltage current-mode sensing scheme with 45ns random read time.M. Chang, C. Wu, C. Kuo, S. Shen, K. Lin, S. Yang, Y. King, C. Lin, and Y. Chih. ISSCC, page 434-436. IEEE, (2012)Area-Efficient Embedded Resistive RAM (ReRAM) Macros Using Logic-Process Vertical-Parasitic-BJT (VPBJT) Switches and Read-Disturb-Free Temperature-Aware Current-Mode Read Scheme.M. Chang, C. Kuo, S. Sheu, C. Lin, Y. King, F. Chen, T. Ku, M. Tsai, J. Wu, and Y. Chih. IEEE J. Solid State Circuits, 49 (4): 908-916 (2014)

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Disambiguation of "Lin, Chorng-Jung"

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An Offset-Tolerant Fast-Random-Read Current-Sampling-Based Sense Amplifier for Small-Cell-Current Nonvolatile Memory.

Please choose a person to relate this publication to

Jung-Hsing Lin

Peh-jung Lin

Bei-Jung Lin

Lin Lin

Lin Lin

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Lin, Chorng-Jung"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML An Offset-Tolerant Fast-Random-Read Current-Sampling-Based Sense Amplifier for Small-Cell-Current Nonvolatile Memory.

Please choose a person to relate this publication to

Jung-Hsing Lin

Peh-jung Lin

Bei-Jung Lin

Lin Lin

Lin Lin

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

An Offset-Tolerant Fast-Random-Read Current-Sampling-Based Sense Amplifier for Small-Cell-Current Nonvolatile Memory.