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Disambiguation of "Dueck, Gerhard W."

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Fault Detection in Parity Preserving Reversible Circuits.

, , , and . ISMVL, page 44-49. IEEE Computer Society, (2016)

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Dagmar Dueck

Johannes Dueck

Margret Dueck

Evelyn Dueck

Gerhard W Paulus

 

Other publications of authors with the same name

Building a Completely Reversible Computer., , , and . CoRR, (2017)Synthesis of Quantum Multiple-Valued Circuits., , and . J. Multiple Valued Log. Soft Comput., 12 (5-6): 431-450 (2006)A transformation based algorithm for reversible logic synthesis., , and . DAC, page 318-323. ACM, (2003)Pairwise decomposition of toffoli gates in a quantum circuit., and . ACM Great Lakes Symposium on VLSI, page 231-236. ACM, (2008)Challenges and advances in Toffoli network optimisation.. IET Comput. Digit. Tech., 8 (4): 172-177 (2014)Efficient Realization of Toffoli and NCV Circuits for IBM QX Architectures., , and . RC, volume 11497 of Lecture Notes in Computer Science, page 131-145. Springer, (2019)GarCoSim: A Framework for Automated Memory Management Research and Evaluation., , , , , and . EAI Endorsed Trans. Scalable Inf. Syst., 3 (9): e4 (2016)Level Compaction in Quantum Circuits., and . IEEE Congress on Evolutionary Computation, page 2405-2409. IEEE, (2006)An ELF-based storage option for the eclipse OMR ahead-of-time compiler., , , , and . CASCON, page 173-178. ACM, (2020)On the Maximum Number of Implicants Needed to Cover a Multiple-Valued Logic Function Using Window Literals., and . ISMVL, page 280-286. IEEE Computer Society, (1991)