( en | de | ru )

 

Disambiguation of "Raghavan, Praveen"

Author of the publication

copydeleteadd this publication to your clipboard
Design Flow for Silicon Chip Implementing Novel Platform Architecture for Wireless Communication.

, , , , , , and . Int. J. Embed. Real Time Commun. Syst., 4 (1): 42-63 (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Raghavan Vallur

Praveen Konidala

Paurush Praveen

Sarada Raghavan

Raghavan Chinnadurai

 

Other publications of authors with the same name

A Customized Cross-Bar for Data-Shuffling in Domain-Specific SIMD Processors., , , , , , and . ARCS, volume 4415 of Lecture Notes in Computer Science, page 57-68. Springer, (2007)Low-leakage sub-threshold 9 T-SRAM cell in 14-nm FinFET technology., , , and . Int. J. Circuit Theory Appl., 45 (11): 1647-1659 (2017)Locality optimization in a compiler for wireless applications., , , , , and . Des. Autom. Embed. Syst., 13 (1-2): 53-72 (2009)MILP-Based Optimization of 2-D Block Masks for Timing-Aware Dummy Segment Removal in Self-Aligned Multiple Patterning Layouts., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (7): 1075-1088 (2017)System Level Comparison of 3D Integration Technologies for Future Mobile MPSoC Platform., , , , , , and . IEEE Embed. Syst. Lett., 6 (4): 85-88 (2014)Coarse-Grained Reconfigurable Array Architectures., , and . Handbook of Signal Processing Systems, Springer, (2013)A Scalable MIMO Detector Processor With Near-ASIC Energy Efficiency., , , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (10): 1973-1986 (2015)Comparison of NBTI aging on adder architectures and ring oscillators in the downscaling technology nodes., , , , , , , , , and 5 other author(s). Microprocess. Microsystems, 39 (8): 1039-1051 (2015)An Efficient Memory Organization for High-ILP Inner Modem Baseband SDR Processors., , , , , , and . J. Signal Process. Syst., 61 (2): 157-179 (2010)Efficient Method to Generate an Energy Efficient Schedule Using Operation Shuffling., , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 91-A (2): 604-612 (2008)