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Transistor Sizing Analysis of Regular Fabrics., , , , and . ARCS Workshops, VDE-Verlag, (2011)All-Digital Simple Clock Synthesis Through a Glitch-Free Variable-Length Ring Oscillator., , and . IEEE Trans. Circuits Syst. II Express Briefs, 61-II (2): 90-94 (2014)Vitruvius+: An Area-Efficient RISC-V Decoupled Vector Coprocessor for High Performance Computing Applications., , , , , , , , , and 14 other author(s). ACM Trans. Archit. Code Optim., 20 (2): 28:1-28:25 (June 2023)VAQUERO: A Scratchpad-based Vector Accelerator for Query Processing., , , , , , , and . HPCA, page 1289-1302. IEEE, (2023)VIA: A Smart Scratchpad for Vector Units with Application to Sparse Matrix Computations., , , , , , , , and . HPCA, page 921-934. IEEE, (2021)Novel charge pump converter with Tunnel FET devices for ultra-low power energy harvesting sources., , and . MWSCAS, page 1-4. IEEE, (2015)ASIC Implementation of An All-digital Self-adaptive PVTA Variation-aware Clock Generation System., and . ACM Great Lakes Symposium on VLSI, page 381-384. ACM, (2016)Design and implementation of an adaptive proactive reconfiguration technique for SRAM caches., , , and . DATE, page 1303-1306. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Novel UHF Passive Rectifier with Tunnel FET Devices., , and . ISVLSI, page 309-314. IEEE Computer Society, (2015)Analysis of Body Bias and RTN-Induced Frequency Shift of Low Voltage Ring Oscillators in FDSOI Technology., , , , , , , , , and 2 other author(s). PATMOS, page 82-87. IEEE, (2018)