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Disambiguation of "Perez-Andrade, Roberto"

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On a Hybrid and General Control Scheme for Algorithms Represented as a Polytope.

, , , and . IPDPS Workshops, page 330-333. IEEE, (2011)

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Roberto Andrade

Roberto Ocaña Pérez

Roberto Francisco Pérez Benito

Plinio Andrade

Susana Andrade

 

Other publications of authors with the same name

A versatile hardware architecture for a constant false alarm rate processor based on a linear insertion sorter., , , and . Digit. Signal Process., 20 (6): 1733-1747 (2010)Processor arrays generation for matrix algorithms used in embedded platforms implemented on FPGAs., , and . Microprocess. Microsystems, 39 (7): 576-588 (2015)On an external memory scheme for processor arrays., , , and . IEICE Electron. Express, 10 (14): 20130324 (2013)A parallelization methodology for reconfigurable systems applied to edge detection., , , and . ReCoSoC, page 1-7. IEEE, (2013)Processor arrays generation for matrix algorithms used in embedded platforms., , , and . ReConFig, page 1-6. IEEE, (2013)A System on a Programmable Chip Architecture for Data-Dependent Superimposed Training Channel Estimation., , , and . Int. J. Reconfigurable Comput., (2009)A Versatile Linear Insertion Sorter Based on a FIFO Scheme., , , and . ISVLSI, page 357-362. IEEE Computer Society, (2008)On a Hybrid and General Control Scheme for Algorithms Represented as a Polytope., , , and . IPDPS Workshops, page 330-333. IEEE, (2011)A versatile hardware architecture for a CFAR detector based on a linear insertion sorter., , , and . FPL, page 467-470. IEEE, (2008)A versatile linear insertion sorter based on an FIFO scheme., , , and . Microelectron. J., 40 (12): 1705-1713 (2009)