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Methodology for operation shuffling and L0 cluster generation for low energy heterogeneous VLIW processors., , , , and . ACM Trans. Design Autom. Electr. Syst., 12 (4): 41 (2007)The Architecture and Efficiency of DON: A Combinatorial Problem Oriented Multicomputer System., , , and . ICDCS, page 174-182. IEEE Computer Society, (1984)Dynamic Reconfigurable Architecture Exploration based on Parameterized Reconfigurable Processor Model., , , , and . VLSI-SoC (Selected Papers), volume 249 of IFIP, page 357-376. Springer, (2006)Design space exploration for DSP applications using the ASIP development system PEAS-III., , , and . ICASSP, page 3168-3171. IEEE, (2002)An efficient lossless data compression method based on exponential-Golomb coding for biomedical information and its implementation using ASIP technology., , , and . BioCAS, page 382-385. IEEE, (2013)An efficient data compression method for artificial vision systems and its low energy implementation using ASIP technology., , , , and . BioCAS, page 81-84. IEEE, (2014)ASPDAC 1995: HDL synthesizability and interoperability., and . IEEE Des. Test Comput., 13 (1): 3-4 (1996)Generation of Pack Instruction Sequence for Media Processors Using Multi-Valued Decision Diagram., , , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 90-A (12): 2800-2809 (2007)An Efficient Performance Estimation Method for Configurable Multi-layer Bus-based SoC., , and . IPSJ Trans. Syst. LSI Des. Methodol., (2015)Task Partitioning Oriented Architecture Exploration Method for Dynamic Reconfigurable Architectures., , , , and . VLSI-SoC, page 290-295. IEEE, (2006)