( en | de | ru )

 

Disambiguation of "Mori, Ryo"

Author of the publication

copydeleteadd this publication to your clipboard
A 123μW standby power technique with EM-tolerant 1.8V I/O NMOS power switch in 28nm HKMG technology.

, , , , , , , , , , and . CICC, page 1-4. IEEE, (2012)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Ryoko Mori

Ryo Sugihara

Ryo Kohsaka

Takahito Mori

Jong Won Ryoo

 

Other publications of authors with the same name

Testability improvement for 12.8 GB/s Wide IO DRAM controller by small area pre-bonding TSV tests and a 1 GHz sampled fully digital noise monitor., , , , , , , , , and 3 other author(s). CICC, page 1-4. IEEE, (2013)A 123μW standby power technique with EM-tolerant 1.8V I/O NMOS power switch in 28nm HKMG technology., , , , , , , , , and 1 other author(s). CICC, page 1-4. IEEE, (2012)A 28 nm High-k/MG Heterogeneous Multi-Core Mobile Application Processor With 2 GHz Cores and Low-Power 1 GHz Cores., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 50 (1): 92-101 (2015)In-Situ Measurement of Supply-Noise Maps With Millivolt Accuracy and Nanosecond-Order Time Resolution., , , , , , , and . IEEE J. Solid State Circuits, 42 (4): 784-789 (2007)10.2 A 28nm HPM heterogeneous multi-core mobile application processor with 2GHz cores and low-power 1GHz cores., , , , , , , , , and 4 other author(s). ISSCC, page 178-179. IEEE, (2014)Design Challenges in 3-D SoC Stacked With a 12.8 GB/s TSV Wide I/O DRAM., , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 6 (3): 364-372 (2016)High density and reliable packaging technology with Non Conductive Film for 3D/TSV., , , , , , , , , and 2 other author(s). 3DIC, page 1-7. IEEE, (2013)