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Bioinspired networks with nanoscale memristive devices that combine the unsupervised and supervised learning approaches.

D. Querlioz, W. Zhao, P. Dollfus, J. Klein, O. Bichler, and C. Gamrat. NANOARCH, page 203-210. ACM, (2012)

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Jacques Klein

Jacques-Olivier Lachaud

Jerome Olivier Klein

Jacques Rakotondranary

Jacques Latta

Other publications of authors with the same name

Perspectives of racetrack memory based on current-induced domain wall motion: From device to system.Y. Zhang, C. Zhang, J. Klein, D. Ravelosona, G. Sun, and W. Zhao. ISCAS, page 381-384. IEEE, (2015)Synthesis of Finite State Machines with Magnetic Domain Wall Logic.J. Klein, E. Belhaire, C. Chappert, F. Ouchet, R. Cowburn, D. Read, and D. Petit. ISCAS, page 133-136. IEEE, (2007)Spin-electronics based logic fabrics.W. Zhao, J. Klein, Z. Wang, Y. Zhang, N. Romdhane, D. Querlioz, D. Ravelosona, and C. Chappert. VLSI-SoC, page 174-179. IEEE, (2013)Magnetic Adder Based on Racetrack Memory.H. Trinh, W. Zhao, J. Klein, Y. Zhang, D. Ravelosona, and C. Chappert. IEEE Trans. Circuits Syst. I Regul. Pap., 60-I (6): 1469-1477 (2013)Synchronous 8-bit Non-Volatile Full-Adder based on Spin Transfer Torque Magnetic Tunnel Junction.E. Deng, Y. Zhang, W. Kang, B. Dieny, J. Klein, G. Prenat, and W. Zhao. IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (7): 1757-1765 (2015)Ultra-Dense Ring-Shaped Racetrack Memory Cache Design.G. Wang, Y. Zhang, B. Zhang, B. Wu, J. Nan, X. Zhang, Z. Zhang, J. Klein, D. Ravelosona, Z. Wang and 2 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (1): 215-225 (2019)Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories.W. Zhao, M. Moreau, E. Deng, Y. Zhang, J. Portal, J. Klein, M. Bocquet, H. Aziza, D. Deleruyelle, C. Muller and 4 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (2): 443-454 (2014)Synchronous full-adder based on complementary resistive switching memory cells.Y. Zhang, E. Deng, J. Klein, D. Querlioz, D. Ravelosona, C. Chappert, W. Zhao, M. Moreau, J. Portal, M. Bocquet and 3 other author(s). NEWCAS, page 1-4. IEEE, (2013)Embedded MRAM for high-speed computing.W. Zhao, Y. Zhang, Y. Lakys, J. Klein, D. Etiemble, D. Revelosona, C. Chappert, L. Torres, L. Cargnini, R. Brum and 2 other author(s). VLSI-SoC, page 37-42. IEEE, (2011)Implementing Binarized Neural Networks with Magnetoresistive RAM without Error Correction.T. Hirtzlin, B. Penkovsky, J. Klein, N. Locatelli, A. Vincent, M. Bocquet, J. Portal, and D. Querlioz. NANOARCH, page 1-5. IEEE, (2019)

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Disambiguation of "Klein, Jacques-Olivier"

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Bioinspired networks with nanoscale memristive devices that combine the unsupervised and supervised learning approaches.

Please choose a person to relate this publication to

Jacques Klein

Jacques-Olivier Lachaud

Jerome Olivier Klein

Jacques Rakotondranary

Jacques Latta

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Klein, Jacques-Olivier"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Bioinspired networks with nanoscale memristive devices that combine the unsupervised and supervised learning approaches.

Please choose a person to relate this publication to

Jacques Klein

Jacques-Olivier Lachaud

Jerome Olivier Klein

Jacques Rakotondranary

Jacques Latta

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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Bioinspired networks with nanoscale memristive devices that combine the unsupervised and supervised learning approaches.