Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

RENO: a high-efficient reconfigurable neuromorphic computing accelerator design.

X. Liu, M. Mao, B. Liu, H. Li, Y. Chen, B. Li, Y. Wang, H. Jiang, M. Barnell, Q. Wu, and J. Yang. DAC, page 66:1-66:6. ACM, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Tongsheng Mao

Lei Mao

Zhengrong Mao

Yiqin Mao

Ning-hui Mao

Other publications of authors with the same name

Distributed replay protocol for distributed uniprocessors.M. Mao, H. An, B. Deng, T. Sun, X. Wei, W. Zhou, and W. Han. ICS, page 3-14. ACM, (2012)Exploring Applications of STT-RAM in GPU Architectures.X. Liu, M. Mao, X. Bi, H. Li, and Y. Chen. IEEE Trans. Circuits Syst. I Regul. Pap., 68 (1): 238-249 (2021)FACRA: Flexible-Core Architecture Chip Resource Abstractor.T. Sun, H. An, Y. Ren, M. Mao, Y. Liu, M. Xu, and Q. Li. PDCAT, page 440-447. IEEE Computer Society, (2010)CD-ECC: content-dependent error correction codes for combating asymmetric nonvolatile memory operation errors.W. Wen, M. Mao, X. Zhu, S. Kang, D. Wang, and Y. Chen. ICCAD, page 1-8. IEEE, (2013)An efficient STT-RAM-based register file in GPU architectures.X. Liu, M. Mao, X. Bi, H. Li, and Y. Chen. ASP-DAC, page 490-495. IEEE, (2015)TEMP: thread batch enabled memory partitioning for GPU.M. Mao, W. Wen, X. Liu, J. Hu, D. Wang, Y. Chen, and H. Li. DAC, page 65:1-65:6. ACM, (2016)Heterogeneous systems with reconfigurable neuromorphic computing accelerators.S. Li, X. Liu, M. Mao, H. Li, Y. Chen, B. Li, and Y. Wang. ISCAS, page 125-128. IEEE, (2016)TriZone: A Design of MLC STT-RAM Cache for Combined Performance, Energy, and Reliability Optimizations.Z. Liu, M. Mao, T. Liu, X. Wang, W. Wen, Y. Chen, H. Li, D. Wang, Y. Pei, and N. Ge. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (10): 1985-1998 (2018)Prefetching techniques for STT-RAM based last-level cache in CMP systems.M. Mao, G. Sun, Y. Li, A. Jones, and Y. Chen. ASP-DAC, page 67-72. IEEE, (2014)Exploration of GPGPU Register File Architecture Using Domain-wall-shift-write based Racetrack Memory.M. Mao, W. Wen, Y. Zhang, Y. Chen, and H. Li. DAC, page 196:1-196:6. ACM, (2014)

BibSonomy

Disambiguation of "Mao, Mengjie"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

RENO: a high-efficient reconfigurable neuromorphic computing accelerator design.

Please choose a person to relate this publication to

Tongsheng Mao

Lei Mao

Zhengrong Mao

Yiqin Mao

Ning-hui Mao

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Mao, Mengjie"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML RENO: a high-efficient reconfigurable neuromorphic computing accelerator design.

Please choose a person to relate this publication to

Tongsheng Mao

Lei Mao

Zhengrong Mao

Yiqin Mao

Ning-hui Mao

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

RENO: a high-efficient reconfigurable neuromorphic computing accelerator design.