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wire with clock forwarding and low-crosstalk contraflow wiring.

J. Wilson, M. Fojtik, J. Poulton, X. Chen, S. Tell, T. Greer, C. Gray, and W. Dally. ISSCC, page 156-157. IEEE, (2016)

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John W Yates

W Gebel

W Kläui

-W Zink

W Ebeling

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The design of DNA self-assembled computing circuitry.C. Dwyer, L. Vicci, J. Poulton, D. Erie, R. Superfine, S. Washburn, and R. II. IEEE Trans. Very Large Scale Integr. Syst., 12 (11): 1214-1220 (2004)A 0.54 pJ/b 20 Gb/s Ground-Referenced Single-Ended Short-Reach Serial Link in 28 nm CMOS for Advanced Packaging Applications.J. Poulton, W. Dally, X. Chen, J. Eyles, T. Greer, S. Tell, J. Wilson, and C. Gray. IEEE J. Solid State Circuits, 48 (12): 3206-3218 (2013)Transmitter equalization for 4-Gbps signaling.W. Dally, and J. Poulton. IEEE Micro, 17 (1): 48-56 (1997)Digital systems engineering.W. Dally, and J. Poulton. Cambridge University Press, (2001)A reverse write assist circuit for SRAM dynamic write VMIN tracking using canary SRAMs.A. Banerjee, M. Sinangil, J. Poulton, C. Gray, and B. Calhoun. ISQED, page 1-8. IEEE, (2014)A 0.297-pJ/Bit 50.4-Gb/s/Wire Inverter-Based Short-Reach Simultaneous Bi-Directional Transceiver for Die-to-Die Interface in 5-nm CMOS.Y. Nishi, J. Poulton, W. Turner, X. Chen, S. Song, B. Zimmer, S. Tell, N. Nedovic, J. Wilson, W. Dally and 1 other author(s). IEEE J. Solid State Circuits, 58 (4): 1062-1073 (2023)A 0.297-pJ/bit 50.4-Gb/s/wire Inverter-Based Short-Reach Simultaneous Bidirectional Transceiver for Die-to-Die Interface in 5nm CMOS.Y. Nishi, J. Poulton, X. Chen, S. Song, B. Zimmer, W. Turner, S. Tell, N. Nedovic, J. Wilson, W. Dally and 1 other author(s). VLSI Technology and Circuits, page 154-155. IEEE, (2022)A 0.190-pJ/bit 25.2-Gb/s/wire Inverter-Based AC-Coupled Transceiver for Short-Reach Die-to-Die Interfaces in 5-nm CMOS.Y. Nishi, J. Poulton, W. Turner, X. Chen, S. Song, B. Zimmer, S. Tell, N. Nedovic, J. Wilson, W. Dally and 1 other author(s). IEEE J. Solid State Circuits, 59 (4): 1146-1157 (April 2024)A 0.54pJ/b 20Gb/s ground-referenced single-ended short-haul serial link in 28nm CMOS for advanced packaging applications.J. Poulton, W. Dally, X. Chen, J. Eyles, T. Greer, S. Tell, and C. Gray. ISSCC, page 404-405. IEEE, (2013)A 1.17-pJ/b, 25-Gb/s/pin Ground-Referenced Single-Ended Serial Link for Off- and On-Package Communication Using a Process- and Temperature-Adaptive Voltage Regulator.J. Poulton, J. Wilson, W. Turner, B. Zimmer, X. Chen, S. Kudva, S. Song, S. Tell, N. Nedovic, W. Zhao and 3 other author(s). IEEE J. Solid State Circuits, 54 (1): 43-54 (2019)

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Disambiguation of "Poulton, John W."

Please choose a person to relate this publication to

John W Yates

W Gebel

W Kläui

-W Zink

W Ebeling

Other publications of authors with the same name

Disambiguation

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Disambiguation of "Poulton, John W."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 8.6 A 6.5-to-23.3fJ/b/mm balanced charge-recycling bus in 16nm FinFET CMOS at 1.7-to-2.6Gb/s/wire with clock forwarding and low-crosstalk contraflow wiring.

Please choose a person to relate this publication to

John W Yates

W Gebel

W Kläui

-W Zink

W Ebeling

Other publications of authors with the same name

Disambiguation