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Disambiguation of "Calhoun, Benton H."

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Digital Circuit Design Challenges and Opportunities in the Era of Nanoscale CMOS.

, , , , , , and . Proc. IEEE, 96 (2): 343-365 (2008)

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Brian Calhoun

H -H Kaatz

Florian H H Giesert

Lobna H airall h

Christoph H -H Traulsen

 

Other publications of authors with the same name

26.8 A 236nW -56.5dBm-sensitivity bluetooth low-energy wakeup receiver with energy harvesting in 65nm CMOS., , , , , , and . ISSCC, page 450-451. IEEE, (2016)Sub-threshold Circuit Design with Shrinking CMOS Devices., , , and . ISCAS, page 2541-2544. IEEE, (2009)New category of ultra-thin notchless 6T SRAM cell layout topologies for sub-22nm., and . ISQED, page 425-430. IEEE, (2011)Can Subthreshold and Near-Threshold Circuits Go Mainstream?, and . IEEE Micro, 30 (4): 80-85 (2010)Serial sub-threshold circuits for ultra-low-power systems., and . ISLPED, page 27-32. ACM, (2009)Virtual prototyper (ViPro): an early design space exploration and optimization tool for SRAM designers., , , and . DAC, page 138-143. ACM, (2010)A 745pA Hybrid Asynchronous Binary-Searching and Synchronous Linear-Searching Digital LDO with 3.8×105 Dynamic Load Range, 99.99% Current Efficiency, and 2mV Output Voltage Ripple., and . ISSCC, page 232-234. IEEE, (2019)A reverse write assist circuit for SRAM dynamic write VMIN tracking using canary SRAMs., , , , and . ISQED, page 1-8. IEEE, (2014)Error-energy analysis of hardware logarithmic approximation methods for low power applications., , , and . ISCAS, page 2361-2364. IEEE, (2015)A Sub-nW 93% Peak Efficiency Buck Converter With Wide Dynamic Range, Fast DVFS, and Asynchronous Load-Transient Control., , and . IEEE J. Solid State Circuits, 57 (7): 2054-2067 (2022)