( en | de | ru )

 

Disambiguation of "Pun, Kong-Pang"

Author of the publication

copydeleteadd this publication to your clipboard
A quadrature IF mixer with high image rejection for continuous-time complex Sigma-Delta modulators.

, , , and . ISCAS (4), page 221-224. IEEE, (2002)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Lucas Pun

Vincent Pang

Cuiping Pang

Jian Pang

Thay Kong

 

Other publications of authors with the same name

A quadrature sampling scheme with improved image rejection for complex-IF receivers., , and . ISCAS (1), page 45-48. IEEE, (2001)Power-Efficient Active-RC CT DSM with a Lowpass Capacitor at the Virtual Ground Node of the First Integrator., , and . ISCAS, page 1-4. IEEE, (2018)Continuous-time delta-sigma modulator with an upfront passive-RC low-pass network., , , and . ISOCC, page 9-10. IEEE, (2017)Novel overshoot cancellation in comparator-based pipelined ADC., and . ISCAS, page 806-809. IEEE, (2012)A charge-pump and comparator based power-efficient pipelined ADC technique., , and . Microelectron. J., 43 (3): 182-188 (2012)A Resistor-Based Sub-1-V CMOS Smart Temperature Sensor for VLSI Thermal Management., , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (9): 1651-1660 (2015)An SAR ADC Switching Scheme With MSB Prediction for a Wide Input Range and Reduced Reference Voltage., and . IEEE Trans. Very Large Scale Integr. Syst., 26 (12): 2863-2872 (2018)A High-Linearity Capacitance-to-Digital Converter Suppressing Charge Errors From Bottom-Plate Switches., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (7): 1928-1941 (2014)A Low-Power CMOS Front-End for Photoplethysmographic Signal Acquisition With Robust DC Photocurrent Rejection., , , and . IEEE Trans. Biomed. Circuits Syst., 2 (4): 280-288 (2008)Correction to Ä 0.5-V 74-dB SNDR 25-kHz Continuous-Time Delta-Sigma Modulator With a Return-to-Open DAC"., , and . IEEE J. Solid State Circuits, 42 (10): 2315 (2007)