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A Novel Heuristic and Provable Bounds for Reconfigurable Architecture Design.

, , and . FPL, page 1-6. IEEE, (2006)

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Knowledge is Power: Module-level Sensing for Runtime Optimisation (Abstact Only)., , , , , and . FPGA, page 276. ACM, (2016)Efficient Heterogeneous Architecture Floorplan Optimization using Analytical Methods., , , and . ACM Trans. Reconfigurable Technol. Syst., 4 (1): 3:1-3:23 (2010)CCDF and Monte Carlo Analysis of a Digital Polar Transmitter for Ultra-Wideband System., , , and . PIMRC, page 1-5. IEEE, (2007)Guest Editors' Introduction: Field Programmable Logic and Applications., , and . IEEE Trans. Computers, 53 (11): 1361-1362 (2004)GPU vs FPGA: A Comparative Analysis for Non-standard Precision., , and . ARC, volume 8405 of Lecture Notes in Computer Science, page 298-305. Springer, (2014)Health monitoring of live circuits in FPGAs based on time delay measurement (abstract only)., , , and . FPGA, page 284. ACM, (2011)Optimizing SDRAM bandwidth for custom FPGA loop accelerators., and . FPGA, page 195-204. ACM, (2012)FPGAs in the Cloud.. FPGA, page 167. ACM, (2017)Delay-Bounded Routing for Shadow Registers., , , , and . FPGA, page 56-65. ACM, (2015)Word-length optimization for differentiable nonlinear systems.. ACM Trans. Design Autom. Electr. Syst., 11 (1): 26-43 (2006)