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Disambiguation of "Kashyap, Chandramouli V."

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Realizable reduction of RLC circuits using node elimination.

, , , , and . ISCAS (3), page 494-497. IEEE, (2003)

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Badrish Chandramouli

Krishna Chandramouli

Anubha Kashyap

Chandramouli Chillakuri

Abhijith Kashyap

 

Other publications of authors with the same name

A realizable driving point model for on-chip interconnect with inductance., and . DAC, page 190-195. ACM, (2000)Performance analysis of deep sub micron VLSI circuits in the presence of self and mutual inductance., , , and . ISCAS (4), page 197-200. IEEE, (2002)RC delay metrics for performance optimization., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 20 (5): 571-582 (2001)Pessimism reduction in coupling-aware static timing analysis using timing and logic filtering., , , , and . ASP-DAC, page 486-491. IEEE, (2008)Quantifying robustness metrics in parameterized static timing analysis., , and . ICCAD, page 209-216. ACM, (2009)A nonlinear cell macromodel for digital applications., , , and . ICCAD, page 678-685. IEEE Computer Society, (2007)Silicon Speedpath Measurement and Feedback into EDA flows., , and . DAC, page 390-395. IEEE, (2007)A noise-driven effective capacitance method with fast embedded noise rule calculation for functional noise analysis., , , , and . DAC, page 186-189. ACM, (2005)DNN-Opt: An RL Inspired Optimization for Analog Circuit Sizing using Deep Neural Networks., , , , , and . DAC, page 1219-1224. IEEE, (2021)Block-based Static Timing Analysis with Uncertainty., and . ICCAD, page 607-614. IEEE Computer Society / ACM, (2003)