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STA: A Highly Scalable Low Latency Butterfly Fat Tree Based 3D NoC Design.

, , and . ISVLSI, page 496-501. IEEE Computer Society, (2016)

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Speed Optimization In Unplanned Traffic Using Bio-Inspired Computing And Population Knowledge Base, , , and . CoRR, (2012)A heuristic method for constructing hexagonal Steiner minimal trees for routing in VLSI., , , and . ISCAS, IEEE, (2006)Diametrical Mesh Of Tree (D2D-MoT) Architecture: A Novel Routing Solution For NoC, and . CoRR, (2012)WiZ-BMS: A Hybrid Wireless Network-on-Chip Design with Fully Adaptive Routing., , and . iSES, page 242-247. IEEE, (2022)Dynamic task allocation and scheduling with contention-awareness for Network-on-Chip based multicore systems., , and . J. Syst. Archit., (2021)Reversible circuit synthesis using ACO and SA based Quine-McCluskey method., , and . MWSCAS, page 416-419. IEEE, (2013)Three Tier Architecture for IoT Driven Health Monitoring System Using Raspberry Pi., and . iSES, page 167-170. IEEE, (2018)An Area and Power Efficient Dynamic TDMA Based Photonic Network on Chip., , , , and . ISED, page 113-117. IEEE Computer Society, (2013)An ABCD Parameter Based Modeling and Analysis of Crosstalk Induced Effects in Multiwalled Carbon Nanotube Bundle Interconnects., , and . VLSID, page 433-438. IEEE Computer Society, (2014)FuzzRoute: A Method for Thermally Efficient Congestion Free Global Routing in 3D ICs., , and . ISVLSI, page 71-76. IEEE Computer Society, (2014)