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Electromagnetic Radiations of FPGAs: High Spatial Resolution Cartography and Attack on a Cryptographic Module., , and . ACM Trans. Reconfigurable Technol. Syst., 2 (1): 4:1-4:24 (2009)Secured CAD Back-End Flow for Power-Analysis-Resistant Cryptoprocessors., , , , and . IEEE Des. Test Comput., 24 (6): 546-555 (2007)Exploration of 3D grid caching strategies for ray-shooting., , , , and . J. Real-Time Image Processing, 7 (1): 3-19 (2012)Jitter Compensation Mechanism for Dynamic Deterministic Networks., , , and . OFC, page 1-3. IEEE, (2023)Evaluation of Power-Constant Dual-Rail Logic as a Protection of Cryptographic Applications in FPGAs., , , , and . SSIRI, page 16-23. IEEE Computer Society, (2008)Formal Evaluation and Construction of Glitch-resistant Masked Functions., , , , , and . HOST, page 304-313. IEEE, (2021)Blind Cartography for Side Channel Attacks: Cross-Correlation Cartography., , , , and . Int. J. Reconfigurable Comput., (2012)Multi-Valued Routing Tracks for FPGAs in 28nm FDSOI Technology., , and . CoRR, (2016)A dual threshold voltage technique for glitch minimization., , and . ICECS, page 444-447. IEEE, (2012)High Efficiency Reconfigurable Cache for Image Processing., , and . ERSA, page 226-232. CSREA Press, (2009)