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Sub-10nm Ultra-thin ZnO Channel FET with Record-High 561 µA/µm ION at VDS 1V, High µ-84 cm2/V-s and1T-1RRAM Memory Cell Demonstration Memory Implications for Energy-Efficient Deep-Learning Computing., , , , , , , , and . VLSI Technology and Circuits, page 326-327. IEEE, (2022)Overcoming Negative nFET VTH by Defect-Compensated Low-Thermal Budget ITO-IGZO Hetero-Oxide Channel to Achieve Record Mobility and Enhancement-mode Operation., , , , , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)I/O thick oxide device integration using Diffusion and Gate Replacement (D&GR) gate stack integration., , , , , , , , , and 2 other author(s). ICICDT, page 1-4. IEEE, (2015)Quantifying the Benefits of Monolithic 3D Computing Systems Enabled by TFT and RRAM., , , , , , and . DATE, page 43-48. IEEE, (2020)A Low-Power DNN Accelerator Enabled by a Novel Staircase RRAM Array., , , , and . IEEE Trans. Neural Networks Learn. Syst., 34 (8): 4416-4427 (August 2023)A Wafer Scale Hybrid Integration Platform for Co-packaged Photonics using a CMOS based Optical InterposerTM., , , , , , , , , and 2 other author(s). VLSI Technology and Circuits, page 381-382. IEEE, (2022)Design of Artificial Spiking Neuron with SiO2 Memristive Synapse to Demonstrate Neuron-Level Spike Timing Dependent Plasticity., , , , , , , and . ICICDT, page 1-3. IEEE, (2019)An 8.2- $\mu$ W 0.14-mm2 16-Channel CDMA-Like Capacitance-to-Digital Converter., , , and . IEEE J. Solid State Circuits, 55 (5): 1361-1373 (2020)Quantile Online Learning for Semiconductor Failure Analysis., , , , and . ICASSP, page 1-5. IEEE, (2023)A Wireless Multi-Channel Capacitive Sensor System for Efficient Glove-Based Gesture Recognition With AI at the Edge., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 67-II (9): 1624-1628 (2020)