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Disambiguation of "Lee, Dongil"

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RhoanaNet Pipeline: Dense Automatic Neural Annotation.

, , , , , , , , , and . CoRR, (2016)

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Xavier Lee Lee

Bongsoo Lee

The role of negative regulators in coordination of the Myxococcus xanthus developmental program. Uni Marburg, (2009)

Min-Hi Lee

Induction and regulation of antiviral defence mechanisms through intracytoplasmic sensors. HU Berlin, (2009)

Hyemin Lee

Viktor Lee

 

Other publications of authors with the same name

A 10-Gb/s Reference-Less Baud-Rate CDR for Low Power Consumption With the Direct Feedback Method., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 65-II (11): 1539-1543 (2018)Standard monomials for the Weyl group F4.. ACM Commun. Comput. Algebra, 49 (3): 74-76 (2015)A 0.9-V 12-Gb/s Two-FIR Tap Direct DFE With Feedback-Signal Common-Mode Control., , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (3): 724-728 (2019)A 0.87 V 12.5 Gb/s Clock-Path Feedback Equalization Receiver with Unfixed Tap Weighting Property in 65 nm CMOS., , , and . VLSI Circuits, page 196-. IEEE, (2019)A 10.8 Gb/s Quarter-Rate 1 FIR 1 IIR Direct DFE With Non-Time-Overlapping Data Generation for 4: 1 CMOS Clockless Multiplexer., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 67-II (1): 67-71 (2020)A 0.65-V, 11.2-Gb/s Power Noise Tolerant Source-Synchronous Injection-Locked Receiver With Direct DTLB DFE., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 65-II (11): 1564-1568 (2018)A 21%-Jitter-Improved Self-Aligned Dividerless Injection-Locked PLL With a VCO Control Voltage Ripple-Compensated Phase Detector., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 63-II (8): 733-737 (2016)A 12 Gb/s 1.59 mW/Gb/s Input-Data-Jitter-Tolerant Injection-Type CDR With Super-Harmonic Injection-Locking in 65-nm CMOS., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 66-II (12): 1972-1976 (2019)Standard monomials for temperley-lieb algebras., and . ACM Commun. Comput. Algebra, 50 (4): 179-181 (2016)An integrated time register and arithmetic circuit with combined operation for time-domain signal processing., , , , and . ISCAS, page 1830-1833. IEEE, (2015)