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A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platform.

, , , , , , and . DATE, page 1256-1263. IEEE Computer Society, (2004)

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Generating production quality software development tools using a machine description language., , , , and . DATE, page 674-678. IEEE Computer Society, (2001)RTL Processor Synthesis for Architecture Exploration and Implementation., , , , , , , and . DATE, page 156-160. IEEE Computer Society, (2004)A Novel Methodology for the Design of Application-Specific Instruction-Set Processors., , and . Embedded Systems Handbook, CRC Press, (2005)Using static scheduling techniques for the retargeting of high speed, compiled simulators for embedded processors from an abstract machine description., , , and . ISSS, page 57-62. ACM / IEEE Computer Society, (2001)A universal technique for fast and flexible instruction-set architecture simulation., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 23 (12): 1625-1639 (2004)Instruction encoding synthesis for architecture exploration using hierarchical processor models., , , , , , and . DAC, page 262-267. ACM, (2003)A universal technique for fast and flexible instruction-set architecture simulation., , , , , and . DAC, page 22-27. ACM, (2002)Architecture Implementation Using the Machine Description Language LISA., , , , and . ASP-DAC/VLSI Design, page 239-244. IEEE Computer Society, (2002)A survey on modeling issues using the machine description language LISA., , , and . ICASSP, page 1137-1140. IEEE, (2001)