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Disambiguation of "Hoare, Raymond R."

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Cyclical Cascade Chains: A Dynamic Barrier Synchronization Mechanism for Multiprocessor Systems.

, and . IPDPS, page 193. IEEE Computer Society, (2001)

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Didier Hoareau

Charlotte Hoareau

Raymond Joly

Raymond Hobrock

Raymond Wreschner

 

Other publications of authors with the same name

A Width Expansion of MMX/SIMD Processing Architecture on an FPGA., , and . IASTED PDCS, page 562-566. IASTED/ACTA Press, (2002)Radio frequency identification prototyping., , , , , , , and . ACM Trans. Design Autom. Electr. Syst., 13 (2): 29:1-29:22 (2008)Linking Compilation and Visualization for Massively Parallel Programs., , , , , and . IPDPS, page 1-8. IEEE, (2007)A hybrid encoding scheme for efficient single-cycle range matching in content addressable memory., , , and . ISCAS, IEEE, (2006)A Low-Energy Reconfigurable Fabric for the SuperCISC Architecture., , , , , and . J. Low Power Electron., 2 (2): 148-164 (2006)A framework for the design, synthesis and cycle-accurate simulation of multiprocessor networks., , , , and . J. Parallel Distributed Comput., 65 (10): 1237-1252 (2005)A VLIW Processor With Hardware Functions: Increasing Performance While Reducing Power., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 53-II (11): 1250-1254 (2006)A Field Programmable RFID Tag and Associated Design Flow., , , , , , , and . FCCM, page 165-174. IEEE Computer Society, (2006)A Low-Energy Reconfigurable Fabric for the SuperCISC Architecture., , , and . FCCM, page 309-310. IEEE Computer Society, (2006)Interconnect routing and scheduling - A near-optimal real-time hardware scheduler for large cardinality crossbar switches., , and . SC, page 94. ACM Press, (2006)