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Disambiguation of "Amiri, Pedram Khalili"

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A Word Line Pulse Circuit Technique for Reliable Magnetoelectric Random Access Memory.

, , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (7): 2027-2034 (2017)

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Roya Khalili-Amiri

Pedram Derakhshani

Pedram Emami

Babak Amiri

Arzhang Khalili

 

Other publications of authors with the same name

Fast and programmable locomotion of hydrogel-metal hybrids under light and magnetic fields., , , , , , , , , and 4 other author(s). Sci. Robotics, 5 (49): 9822 (2020)A Word Line Pulse Circuit Technique for Reliable Magnetoelectric Random Access Memory., , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (7): 2027-2034 (2017)Adaptive MRAM Write and Read with MTJ Variation Monitor., , , , , and . IEEE Trans. Emerg. Top. Comput., 9 (1): 402-413 (2021)Hybrid VC-MTJ/CMOS non-volatile stochastic logic for efficient computing., , , , , , , and . DATE, page 1438-1443. IEEE, (2017)A Dual-Data Line Read Scheme for High-Speed Low-Energy Resistive Nonvolatile Memories., , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 26 (2): 272-279 (2018)Ultra-low-power, high-density spintronic programmable logic (SPL)., , , and . ISCAS, page 169-172. IEEE, (2016)A ReRAM-Based Nonvolatile Flip-Flop With Self-Write-Termination Scheme for Frequent-OFF Fast-Wake-Up Nonvolatile Processors., , , , , , , , , and 8 other author(s). IEEE J. Solid State Circuits, 52 (8): 2194-2207 (2017)A 65-nm ReRAM-Enabled Nonvolatile Processor With Time-Space Domain Adaption and Self-Write-Termination Achieving > 4× Faster Clock Frequency and > 6× Higher Restore Speed., , , , , , , , , and 7 other author(s). IEEE J. Solid State Circuits, 52 (10): 2769-2785 (2017)