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Cool-Fetch: A Compiler-Enabled IPC Estimation Based Framework for Energy Reduction.

, , , and . Interaction between Compilers and Computer Architectures, page 43-52. IEEE Computer Society, (2004)

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Nanowire Volatile RAM as an Alternative to SRAM., , and . JETC, 12 (3): 30:1-30:13 (2015)NP-Dynamic Skybridge: A Fine-Grained 3D IC Technology with NP-Dynamic Logic., , , , and . IEEE Trans. Emerg. Top. Comput., 5 (2): 286-299 (2017)Parametrized hardware architectures for the Lucas primality test., , and . ICSAMOS, page 124-131. IEEE, (2011)Architecting for Causal Intelligence at Nanoscale., , , , , , , and . Computer, 48 (12): 54-64 (2015)Combining 2-level logic families in grid-based nanoscale fabrics., , and . NANOARCH, page 101-108. IEEE Computer Society, (2007)Architecting NP-Dynamic Skybridge., , , , and . NANOARCH, page 169-174. IEEE Computer Society, (2015)Fine-grained 3D reconfigurable computing fabric with RRAM., , , and . NANOARCH, page 79-80. IEEE, (2017)Architecting connectivity for fine-grained 3-D vertically integrated circuits., , , , and . NANOARCH, page 175-180. IEEE Computer Society, (2015)Hybrid Graphene Nanoribbon-CMOS tunneling volatile memory fabric., , , , , and . NANOARCH, page 189-195. IEEE Computer Society, (2011)N3ASICs: Designing nanofabrics with fine-grained CMOS integration., , and . NANOARCH, page 196-202. IEEE Computer Society, (2011)