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Offset-Canceling Current-Sampling Sense Amplifier for Resistive Nonvolatile Memory in 65 nm CMOS.

, , , , and . IEEE J. Solid State Circuits, 52 (2): 496-504 (2017)

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Minimum delay optimization for domino circuits - a coupling-aware approach., , , and . ACM Trans. Design Autom. Electr. Syst., 8 (2): 202-213 (2003)A comparative study of STT-MTJ based non-volatile flip-flops., , , , and . ISCAS, page 109-112. IEEE, (2013)Process variation tolerant all-digital multiphase DLL for DDR3 interface., , , , , , and . CICC, page 1-4. IEEE, (2010)Dynamic mixed serial-parallel content addressable memory (DMSP CAM)., , , and . I. J. Circuit Theory and Applications, 41 (7): 721-731 (2013)Equalization scheme analysis for high-density spin transfer torque random access memory., , , , , and . ISOCC, page 99-100. IEEE, (2016)A low-power 1.85 GHz 32-bit carry lookahead adder using Dual Path All-N-Logic., , , , , and . ISCAS (2), page 781-784. IEEE, (2004)New current-mode sense amplifiers for high density DRAM and PIM architectures., , , , and . ISCAS (4), page 938-941. IEEE, (2001)SRAM Cell with Data-Aware Power-Gating Write-Asist for Near-Threshold Operation., and . ISCAS, page 1-4. IEEE, (2018)An Energy-Efficient All-Digital Time-Domain-Based CMOS Temperature Sensor for SoC Thermal Management., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (8): 1508-1517 (2015)An Offset-Canceling Triple-Stage Sensing Circuit for Deep Submicrometer STT-RAM., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (7): 1620-1624 (2014)