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iMACE: In-Memory Acceleration of Classic McEliece Encoder., , , , and . ISVLSI, page 513-518. IEEE, (2019)A Monolithic-3D SRAM Design with Enhanced Robustness and In-Memory Computation Support., , , , , , , , , and 3 other author(s). ISLPED, page 34:1-34:6. ACM, (2018)Attack resilient architecture to replace embedded Flash with STTRAM in homogeneous IoTs., , and . CoRR, (2016)Impact of Process Variation on Self-Reference Sensing Scheme and Adaptive Current Modulation for Robust STTRAM Sensing., , and . JETC, 14 (1): 8:1-8:17 (2018)Cache-Out: Leaking Cache Memory Using Hardware Trojan., , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (6): 1461-1470 (2020)Quantum-Soft QUBO Suppression for Accurate Object Detection., and . ECCV (29), volume 12374 of Lecture Notes in Computer Science, page 158-173. Springer, (2020)Addressing Resiliency of In-Memory Floating Point Computation., , , and . CoRR, (2020)Modeling of Retention Time for High-Speed Embedded Dynamic Random Access Memories.. IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (9): 2596-2604 (2014)Exploiting Serial Access and Asymmetric Read/Write of Domain Wall Memory for Area and Energy-Efficient Digital Signal Processor Design., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 63-I (1): 91-102 (2016)Energy centric model of SRAM write operation for improved energy and error rates.. CICC, page 1-4. IEEE, (2013)