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Statistical Test Compaction Using Binary Decision Trees.

, and . IEEE Des. Test Comput., 23 (6): 452-462 (2006)

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A Path Sensitization Technique for Testing of Switched Capacitor Circuits., and . VLSI Design, page 30-35. IEEE Computer Society, (2003)Generalized Sensitization using Fault Tuples., , and . VTS, page 297-303. IEEE Computer Society, (2004)SERDES external loopback test using production parametric-test hardware., , , and . ITC, page 1-7. IEEE, (2016)Reducing test cost of integrated, heterogeneous systems using pass-fail test data analysis., , and . ACM Trans. Design Autom. Electr. Syst., 19 (2): 20:1-20:23 (2014)Specification Test Compaction for Analog Circuits and MEMS, , , and . CoRR, (2007)Reducing Test Execution Cost of Integrated, Heterogeneous Systems Using Continuous Test Data., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (1): 148-158 (2011)Statistical Test Compaction Using Binary Decision Trees., and . IEEE Des. Test Comput., 23 (6): 452-462 (2006)Test Compaction for Mixed-Signal Circuits Using Pass-Fail Test Data., and . VTS, page 299-308. IEEE Computer Society, (2008)Innovative practices session 5C: Machine learning and data analysis in test., , , and . VTS, page 1. IEEE Computer Society, (2014)An Industrial Study of System-Level Test., and . IEEE Des. Test Comput., 29 (1): 19-27 (2012)