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Disambiguation of "Siriburanon, Teerachot"

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24.9 A 128-QAM 60GHz CMOS transceiver for IEEE802.11ay with calibration of LO feedthrough and I/Q imbalance.

, , , , , , , , , , , , , , , , , , , , , , , , and . ISSCC, page 424-425. IEEE, (2017)

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A 30-GHz class-F23 oscillator in 28nm CMOS using harmonic extraction and achieving 120 kHz 1/f3 corner., , and . ESSCIRC, page 87-90. IEEE, (2017)A Low-Flicker-Noise 30-GHz Class-F23 Oscillator in 28-nm CMOS Using Implicit Resonance and Explicit Common-Mode Return Path., , and . IEEE J. Solid State Circuits, 53 (7): 1977-1987 (2018)Dickson-Charge-Pump-Based Voltage-to-Time Conversion for Time-Based ADCs in 28-nm CMOS., , , , and . IEEE Open J. Circuits Syst., (2021)28 GHz Quadrature Frequency Generation Exploiting Injection-Locked Harmonic Extractors for 5G Communications., , , and . NEWCAS, page 1-4. IEEE, (2019)A 265μW Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS., , , , , , , , , and 1 other author(s). ISSCC, page 256-258. IEEE, (2019)An LC-DCO based synthesizable injection-locked PLL with an FoM of -250.3dB., , , , , and . ESSCIRC, page 197-200. IEEE, (2016)A Compact 0.2-0.3-V Inverse-Class-F23 Oscillator for Low 1/f3 Noise Over Wide Tuning Range., , , , , , and . IEEE J. Solid State Circuits, 57 (2): 452-464 (2022)A 2.2 GHz -242dB-FOM 4.2 mW ADC-PLL Using Digital Sub-Sampling Architecture., , , , , , , , , and . IEEE J. Solid State Circuits, 51 (6): 1385-1397 (2016)A Compact, Low-Power, Low-NF, Millimeter-Wave Cascode LNA With Magnetic Coupling Feedback in 22-nm FD-SOI CMOS for 5G Applications., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 70 (4): 1331-1335 (April 2023)A Constant-Current-Controlled Class-C Voltage-Controlled Oscillator using Self-Adjusting Replica Bias Circuit., , , and . IEICE Trans. Electron., 98-C (6): 471-479 (2015)