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Scalable Low-Latency Persistent Neural Machine Translation on CPU Server with Multiple FPGAs., , , , , , , , , and . FPT, page 307-310. IEEE, (2019)A low power seizure detection processor based on direct use of compressively-sensed data and employing a deterministic random matrix., , , , and . BioCAS, page 1-4. IEEE, (2015)BiNMAC: Binarized neural Network Manycore ACcelerator., , , , and . ACM Great Lakes Symposium on VLSI, page 443-446. ACM, (2018)CS-Based Secured Big Data Processing on FPGA., , , and . FCCM, page 201. IEEE Computer Society, (2016)Why Compete When You Can Work Together: FPGA-ASIC Integration for Persistent RNNs., , , , , , , , , and 6 other author(s). FCCM, page 199-207. IEEE, (2019)Utility Proportional Optimization Flow Control for Overlay Multicast., , , and . ISPA, page 401-407. IEEE Computer Society, (2009)A Scalable and Low Power DCNN for Multimodal Data Classification., , , and . ReConFig, page 1-6. IEEE, (2018)Fast uniform content-based satellite image registration using the scale-invariant feature transform descriptor., and . Frontiers Inf. Technol. Electron. Eng., 18 (8): 1108-1116 (2017)A Simple Guide for Plotting a Proper Bifurcation Diagram., , , , and . Int. J. Bifurc. Chaos, 31 (1): 2150011:1-2150011:11 (2021)Design optimization of analog integrated circuits by using artificial neural networks., , and . SoCPaR, page 385-388. IEEE, (2010)