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Disambiguation of "Sun, Dar"

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A 64-Kb 0.37V 28nm 10T-SRAM with mixed-Vth read-port and boosted WL scheme for IoT applications.

, , , , , , , and . A-SSCC, page 185-188. IEEE, (2016)

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Shaul Dar

Cheng-Dar Yue

Yü-Sün Sun

Altaf Ahmad Dar

Maureen Dar Iang

 

Other publications of authors with the same name

A 64-Kb 0.37V 28nm 10T-SRAM with mixed-Vth read-port and boosted WL scheme for IoT applications., , , , , , , and . A-SSCC, page 185-188. IEEE, (2016)A 5-nm 254-TOPS/W 221-TOPS/mm2 Fully-Digital Computing-in-Memory Macro Supporting Wide-Range Dynamic-Voltage-Frequency Scaling and Simultaneous MAC and Write Operations., , , , , , , , , and 8 other author(s). ISSCC, page 1-3. IEEE, (2022)15.3 A 351TOPS/W and 372.4GOPS Compute-in-Memory SRAM Macro in 7nm FinFET CMOS for Machine-Learning Applications., , , , , , , and . ISSCC, page 242-244. IEEE, (2020)Compact Measurement Schemes for Bit-Line Swing, Sense Amplifier Offset Voltage, and Word-Line Pulse Width to Characterize Sensing Tolerance Margin in a 40 nm Fully Functional Embedded SRAM., , , , , , , , and . IEEE J. Solid State Circuits, 47 (4): 969-980 (2012)An 89TOPS/W and 16.3TOPS/mm2 All-Digital SRAM-Based Full-Precision Compute-In Memory Macro in 22nm for Machine-Learning Edge Applications., , , , , , , , , and 10 other author(s). ISSCC, page 252-254. IEEE, (2021)A 7-nm Compute-in-Memory SRAM Macro Supporting Multi-Bit Input, Weight and Output and Achieving 351 TOPS/W and 372.4 GOPS., , , , , , , , and . IEEE J. Solid State Circuits, 56 (1): 188-198 (2021)17.2 A 64kb 16nm asynchronous disturb current free 2-port SRAM with PMOS pass-gates for FinFET technologies., , , , , , , , , and 2 other author(s). ISSCC, page 1-3. IEEE, (2015)An Exploratory Study on Statistical Timing Analysis and Parametric Yield Optimization., , , , , and . ISQED, page 677-684. IEEE Computer Society, (2007)Enhancement of mixing performance of water solutions in a micro-mixer with immiscible ferrofluid., , , and . NEMS, page 69-74. IEEE Computer Society, (2009)