Author of the publication

Low Power High Performance FinFET Standard Cells Based on Mixed Back Biasing Technology.

, , , , , and . IEICE Trans. Electron., 99-C (8): 974-983 (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Improving DFA on AES using all-fault ciphertexts., , , , , , and . ASICON, page 283-286. IEEE, (2017)An Enhancement of Crosstalk Avoidance Code Based on Fibonacci Numeral System for Through Silicon Vias., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (5): 1601-1610 (2017)Low Power High Performance FinFET Standard Cells Based on Mixed Back Biasing Technology., , , , , and . IEICE Trans. Electron., 99-C (8): 974-983 (2016)Design and Implementation of a 2-level FSK Digital Modems Using CORDIC Algorithm., , , and . APCCAS, page 1753-1756. IEEE, (2006)A synthesis method for logic circuits in RRAM arrays., , , and . Sci. China Inf. Sci., 63 (10): 1-3 (2020)The ANN Based Modeling Attack and Security Enhancement of the Double-layer PUF., , , and . ITC-Asia, page 1-6. IEEE, (2021)The area-efficient gate level information flow tracking schemes of digital circuit with multi-level security lattice., , , and . Microelectron. J., (February 2024)Enhanced error correction against multiple-bit-upset based on BCH code for SRAM., , and . ASICON, page 1-4. IEEE, (2013)Flash-based Computing in-Memory Scheme for IOT., , , , , and . ASICON, page 1-4. IEEE, (2019)Context-adaptive fast motion estimation of HEVC., , , and . ISCAS, page 2784-2787. IEEE, (2015)