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14.9 Sub-sampling all-digital fractional-N frequency synthesizer with -111dBc/Hz in-band phase noise and an FOM of -242dB.

Z. Chen, Y. Wang, J. Shin, Y. Zhao, S. Mirhaj, Y. Kuan, H. Chen, C. Jou, M. Tsai, F. Hsueh, and M. Chang. ISSCC, page 1-3. IEEE, (2015)

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Yen-cheng Wu

Nancy Shui-Yen Cheng

Pei Kuang

Kuan Tong

Yen Yen Kwan

Other publications of authors with the same name

An 8-bit 10-GHz 21-mW Time-Interleaved SAR ADC With Grouped DAC Capacitors and Dual-Path Bootstrapped Switch.E. Swindlehurst, H. Jensen, A. Petrie, Y. Song, Y. Kuan, Y. Qu, M. Chang, J. Wu, and S. Chiang. IEEE J. Solid State Circuits, 56 (8): 2347-2359 (2021)Tensor Levenberg-Marquardt Algorithm for Multi-Relational Traffic Prediction.S. Chang, H. Wu, Y. Kuan, and Y. Wu. IEEE Trans. Veh. Technol., 72 (9): 11275-11290 (September 2023)22.2 A 176-channel 0.5cm3 0.7g wireless implant for motor function recovery after spinal cord injury.Y. Lo, C. Chang, Y. Kuan, S. Culaclii, B. Kim, K. Chen, P. Gad, V. Edgerton, and W. Liu. ISSCC, page 382-383. IEEE, (2016)A Multi-Stage Zero-Crossing-Based Amplifier Using Floating-Inverter Amplifier With Background Offset Calibration and Self-Timed Loop.T. Barton, Y. Kuan, and S. Chiang. MWSCAS, page 1-5. IEEE, (2023)Innovative Audio Mosaic Technique by Permutations.E. Sun, H. Wu, C. Busch, S. Huang, Y. Kuan, and J. Wu. BMSB, page 1-5. IEEE, (2020)A Millimeter Wave Digital CMOS Baseband Transceiver for Wireless LAN Applications.K. Chiu, H. Chan, W. Lee, C. Wu, H. Davila, H. Liu, M. Huang, C. Liu, T. Lee, H. Chang and 5 other author(s). A-SSCC, page 275-278. IEEE, (2019)Digital PLL for phase noise cancellation in ring oscillator-based I/Q receivers.Z. Chen, Y. Li, Y. Kuan, B. Hu, C. Wong, and M. Chang. VLSI Circuits, page 1-2. IEEE, (2016)A Novel Protocol-Free Bandage-Cover Cryptographer.E. Sun, H. Wu, S. Huang, and Y. Kuan. IEEE Trans. Cybern., 52 (11): 11431-11441 (2022)A Tensor Singular Value Decomposition Accelerator for Hyperspectral Imaging Applications.S. Jigalur, and Y. Kuan. ICECS, page 1-4. IEEE, (2023)An 8-bit 10-GHz 21-mW Time-Interleaved SAR ADC With Grouped DAC Capacitors and Dual-Path Bootstrapped Switch.E. Swindlehurst, H. Jensen, A. Petrie, Y. Song, Y. Kuan, M. Chang, J. Wu, and S. Chiang. ESSCIRC, page 83-86. IEEE, (2019)

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Disambiguation of "Kuan, Yen-Cheng"

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14.9 Sub-sampling all-digital fractional-N frequency synthesizer with -111dBc/Hz in-band phase noise and an FOM of -242dB.

Please choose a person to relate this publication to

Yen-cheng Wu

Nancy Shui-Yen Cheng

Pei Kuang

Kuan Tong

Yen Yen Kwan

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Kuan, Yen-Cheng"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 14.9 Sub-sampling all-digital fractional-N frequency synthesizer with -111dBc/Hz in-band phase noise and an FOM of -242dB.

Please choose a person to relate this publication to

Yen-cheng Wu

Nancy Shui-Yen Cheng

Pei Kuang

Kuan Tong

Yen Yen Kwan

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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14.9 Sub-sampling all-digital fractional-N frequency synthesizer with -111dBc/Hz in-band phase noise and an FOM of -242dB.