Author of the publication

Crossbar array of selector-less TaOx/TiO2 bilayer RRAM.

, , , , , and . Microelectron. Reliab., 55 (11): 2220-2223 (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A 12-bit 40-MS/s calibration-free SAR ADC., , , and . ISCAS, page 1-4. IEEE, (2017)Optimizing Control Transfer and Memory Virtualization in Full System Emulators., , , , , and . TACO, 12 (4): 47:1-47:24 (2016)Code scheduling and register allocation in large basic blocks., and . ICS, page 442-452. ACM, (1988)Dynamic performance tuning for speculative threads., , , , , and . ISCA, page 462-473. ACM, (2009)Supporting Speculative Multithreading on Simultaneous Multithreaded Processors., , , , and . HiPC, volume 4297 of Lecture Notes in Computer Science, page 148-158. Springer, (2006)Exploiting Vector Processing in Dynamic Binary Translation., , , , , and . ICPP, page 93:1-93:10. ACM, (2019)Efficient Dynamic Device Placement for Deep Neural Network Training on Heterogeneous Systems., , and . SAMOS, volume 11733 of Lecture Notes in Computer Science, page 51-64. Springer, (2019)Instruction Scheduling for the HP PA-8000., and . MICRO, page 298-307. ACM/IEEE Computer Society, (1996)An LLVM-based hybrid binary translation system., , , and . SIES, page 229-236. IEEE, (2012)Reducing Code Size by Graph Coloring Register Allocation and Assignment Algorithm for Mixed-Width ISA Processor., , , , and . CSE (2), page 174-181. IEEE Computer Society, (2009)