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Wafer-Package Test Mix for Optimal Defect Detection and Test Time Savings.. IEEE Des. Test Comput., 20 (5): 84-89 (2003)Defect-Oriented Test: Effectiveness in High Volume Manufacturing., , , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (3): 584-597 (2021)Guest Editors' Introduction: Defect-Oriented Testing in the Deep-Submicron Era., and . IEEE Des. Test Comput., 19 (5): 5-7 (2002)Current ratios: a self-scaling technique for production IDDQ testing., , , , , , and . ITC, page 1148-1156. IEEE Computer Society, (2000)Quality impacts of non-uniform fault coverage.. VTS, page 197-200. IEEE Computer Society, (1994)Comparative Analysis of Different Implementations of Multiple-Input Signature Analyzers.. IEEE Trans. Computers, 37 (11): 1411-1414 (1988)Reductions in quality caused by uneven fault coverage of different areas of an integrated circuit.. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 14 (5): 603-607 (1995)The Effect of Different Test Sets on Quality Level Prediction: When is 80% better than 90%?, , , and . ITC, page 358-364. IEEE Computer Society, (1991)Bridge over troubled waters: Critical area based pattern generation., , , and . ETS, page 1-6. IEEE, (2017)ETS 2015 best paper., and . ETS, page 1. IEEE, (2016)