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Disambiguation of "Ohba, Takayuki"

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Characterization of stress distribution in ultra-thinned DRAM wafer.

, , , , and . 3DIC, page TS3.2.1-TS3.2.5. IEEE, (2015)

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Takayuki Sugimoto

Takayuki Sugimoto

Takayuki Shindo

Takayuki Saito

 

Other publications of authors with the same name

Influence of wafer thinning process on backside damage in 3D integration., , , , , , , , , and 2 other author(s). 3DIC, page 1-6. IEEE, (2013)Reliability of Wafer-Level Ultra-Thinning down to 3 µm using 20 nm-Node DRAMs., , , , , , and . IRPS, page 1-6. IEEE, (2021)Low-ESL (<1 pH @ 8.5 GHz) Multi-Terminal Si Capacitor Embedded in 3D Functional Interposer for Power Delivery Network., , , , , , , , , and 1 other author(s). VLSI Technology and Circuits, page 385-386. IEEE, (2022)Development of ultra-thinning technology for logic and memory heterogeneous stack applications., , , , , , , , , and 2 other author(s). 3DIC, page 1-4. IEEE, (2011)Characterization of stress distribution in ultra-thinned DRAM wafer., , , , and . 3DIC, page TS3.2.1-TS3.2.5. IEEE, (2015)Three-dimensional Integration (3DI) with Bumpless Interconnects for Tera-scale Generation : High Speed, Low Power, and Ultra-small Operating Platform., and . CICC, page 1-6. IEEE, (2019)Characterization of local strain around trough silicon via interconnects in wafer-on-wafer structures., , , , , , and . 3DIC, page 1-4. IEEE, (2011)Comparative study of side-wall roughness effects on leakage currents in through-silicon via interconnects., , , , , and . 3DIC, page 1-4. IEEE, (2011)High Bandwidth Memory (HBM) and High Bandwidth NAND (HBN) with the Bumpless TSV Technology., and . 3DIC, page 1-4. IEEE, (2019)Review of wafer-level three-dimensional integration (3DI) using bumpless interconnects for tera-scale generation., , , , , and . IEICE Electron. Express, 12 (7): 20152002 (2015)