( en | de | ru )

 

Disambiguation of "Papadimitriou, George"

Author of the publication

copydeleteadd this publication to your clipboard
Microprocessor reliability-performance tradeoffs assessment at the microarchitecture level.

, , , , and . VTS, page 1-6. IEEE Computer Society, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Evripidis Papadimitriou

Georg Papadimitriou

Sofia Papadimitriou

Joannis Papadimitriou

Dimitra Papadimitriou

 

Other publications of authors with the same name

Statistical Analysis of Multicore CPUs Operation in Scaled Voltage Conditions., , , and . IEEE Comput. Archit. Lett., 17 (2): 109-112 (2018)Towards Accurate Performance Modeling of RISC-V Designs., , , and . CoRR, (2021)Exceeding Conservative Limits: A Consolidated Analysis on Modern Hardware Margins., , , , , , , and . CoRR, (2020)Measuring the impact of burst buffers on data-intensive scientific workflows., , , , and . Future Gener. Comput. Syst., (2019)Soft Error Effects on Arm Microprocessors: Early Estimations Versus Chip., , , , and . Computer, 56 (7): 4-6 (2023)The Evolution of the Pegasus Workflow Management Software., , , , , , and . Comput. Sci. Eng., 21 (4): 22-36 (2019)gpuFI-4: A Microarchitecture-Level Framework for Assessing the Cross-Layer Resilience of Nvidia GPUs., , and . ISPASS, page 35-45. IEEE, (2022)Boosting Microprocessor Efficiency: Circuit- and Workload-Aware Assessment of Timing Errors., , , and . IISWC, page 125-137. IEEE, (2021)Characterizing Soft Error Vulnerability of CPUs Across Compiler Optimizations and Microarchitectures., and . IISWC, page 113-124. IEEE, (2021)Fair sharing of network resources among workflow ensembles., , , , , , , , , and . Clust. Comput., 25 (4): 2873-2891 (2022)