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YAML: A Tool for Hardware Design Visualization and Capture.

, , , , , and . ISSS, page 9-17. ACM / IEEE Computer Society, (2000)

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Typing abstractions and management in a component framework., , and . ASP-DAC, page 115-122. ACM, (2003)Polychrony for Formal Refinement-Checking in a System-Level Design Methodology., , , , and . ACSD, page 9-19. IEEE Computer Society, (2003)Polychrony for Refinement-Based Design., , , , and . DATE, page 11172-11173. IEEE Computer Society, (2003)YAML: A Tool for Hardware Design Visualization and Capture., , , , , and . ISSS, page 9-17. ACM / IEEE Computer Society, (2000)Reactivity in SystemC Transaction-Level Models., , , , and . Haifa Verification Conference, volume 4899 of Lecture Notes in Computer Science, page 34-50. Springer, (2007)Structured Component Composition Frameworks for Embedded System Design., , and . HiPC, volume 2552 of Lecture Notes in Computer Science, page 663-678. Springer, (2002)Formal Refinement Checking in a System-level Design Methodology., , , , and . Fundam. Informaticae, 62 (2): 243-273 (2004)BALBOA: a component-based design environment for system models., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 22 (12): 1597-1612 (2003)A methodology to take credit for high-level verification during RTL verification., and . Formal Methods Syst. Des., 51 (2): 395-418 (2017)An Environment for Dynamic Component Composition for Efficient Co-Design ., , , and . DATE, page 736-743. IEEE Computer Society, (2002)