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Disambiguation of "Cho, Minsik"

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Fast substrate noise-aware floorplanning with preference directed graph for mixed-signal SOCs.

, , and . ASP-DAC, page 765-770. IEEE, (2006)

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Miyeon Cho

Photooxygenierung in Mikroemulsionen und mit dualen Photokatalysatoren. Uni Köln, (2009)

Seongdon Cho

Myunghun Cho

Soon Cho

Yongsun Cho

 

Other publications of authors with the same name

BoxRouter 2.0: A hybrid and robust global router with layer assignment for routability., , , and . ACM Trans. Design Autom. Electr. Syst., 14 (2): 32:1-32:21 (2009)ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction., , , and . DAC, page 504-509. ACM, (2008)Global Routing., and . Encyclopedia of Algorithms, (2016)A Continuously-Scalable-Conversion-Ratio Step-Up/Down SC Energy-Harvesting Interface With MPPT Enabled by Real-Time Power Monitoring With Frequency-Mapped Capacitor DAC., , , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 69 (4): 1820-1831 (2022)DKM: Differentiable k-Means Clustering Layer for Neural Network Compression., , , and . ICLR, OpenReview.net, (2022)A Unified Approximation Framework for Compressing and Accelerating Deep Neural Networks., , , , , , and . ICTAI, page 376-383. IEEE, (2019)Fast Substrate Noise Aware Floorplanning for Mixed Signal SOC Designs., and . IEEE Trans. Very Large Scale Integr. Syst., 16 (12): 1713-1717 (2008)Scalable Deep Learning Inference: Algorithmic Approach.. IPDPS Workshops, page 990. IEEE, (2020)Metal-Density-Driven Placement for CMP Variation and Routability., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (12): 2145-2155 (2008)BoxRouter: A New Global Router Based on Box Expansion and Progressive ILP., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (12): 2130-2143 (2007)