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Disambiguation of "Kim, Dae Suk"

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18.3 A 1.2V 64Gb 8-channel 256GB/s HBM DRAM with peripheral-base-die architecture and small-swing technique on heavy load interface.

, , , , , , , , , , , , , , , , , , , , , and . ISSCC, page 318-319. IEEE, (2016)

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Dae-Soon Kim

Yong-Dae Kim

Dae-Uh Kim

Chong-dae Kim

Dae-Shik Kim

 

Other publications of authors with the same name

Degradation analysis of secondary lens system and its effect on performance of LED-based luminaire., , and . Microelectron. Reliab., 54 (1): 131-137 (2014)18.3 A 1.2V 64Gb 8-channel 256GB/s HBM DRAM with peripheral-base-die architecture and small-swing technique on heavy load interface., , , , , , , , , and 12 other author(s). ISSCC, page 318-319. IEEE, (2016)High bandwidth memory(HBM) with TSV technique., , , , , , , , , and 9 other author(s). ISOCC, page 181-182. IEEE, (2016)Development of Enhanced Data Mining System to Approximate Empirical Formula for Ship Design., , , , , and . KSEM, volume 4798 of Lecture Notes in Computer Science, page 425-436. Springer, (2007)25.2 A 1.2V 8Gb 8-channel 128GB/s high-bandwidth memory (HBM) stacked DRAM with effective microbump I/O test methods using 29nm process and TSV., , , , , , , , , and 7 other author(s). ISSCC, page 432-433. IEEE, (2014)A 1.1V 1ynm 6.4Gb/s/pin 16Gb DDR5 SDRAM with a Phase-Rotator-Based DLL, High-Speed SerDes and RX/TX Equalization Scheme., , , , , , , , , and 25 other author(s). ISSCC, page 380-382. IEEE, (2019)A low-power small-area open loop digital DLL for 2.2Gb/s/pin 2Gb DDR3 SDRAM., , , , , , , , , and . A-SSCC, page 157-160. IEEE, (2011)