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How to improve the space utilization of dedup-based PCM storage devices?

, , , , and . CODES+ISSS, page 11-20. IEEE, (2015)

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How to improve the space utilization of dedup-based PCM storage devices?, , , , and . CODES+ISSS, page 11-20. IEEE, (2015)A buffer cache architecture for smartphones with hybrid DRAM/PCM memory., , , and . NVMSA, page 1-6. IEEE, (2015)A Light-Weighted Software-Controlled Cache for PCM-based Main Memory Systems., , , and . ICCAD, page 22-29. IEEE, (2015)Sparse ReRAM engine: joint exploration of activation and weight sparsity in compressed neural networks., , , , , , and . ISCA, page 236-249. ACM, (2019)A 45nm 6b/cell charge-trapping flash memory using LDPC-based ECC and drift-immune soft-sensing engine., , , , and . ISSCC, page 222-223. IEEE, (2013)Realizing erase-free SLC flash memory with rewritable programming design., , , , and . CODES+ISSS, page 7:1-7:10. ACM, (2016)On Relaxing Page Program Disturbance over 3D MLC Flash Memory., , , , , and . ICCAD, page 479-486. IEEE, (2015)Fine-grained write scheduling for PCM performance improvement under write power budget., , , and . ISLPED, page 19-24. IEEE, (2015)Re-Polarization Processing in Extended Polar Codes., , and . IEICE Trans. Commun., 100-B (10): 1765-1777 (2017)A Resistance Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100× for Storage Class Memory Applications., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 52 (1): 218-228 (2017)