Author of the publication

FPGA-based Circuit for Central Pattern Generator in Quadruped Locomotion.

, , and . Aust. J. Intell. Inf. Process. Syst., (2010)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Real-time field programmable gate array architecture for computer vision., and . J. Electronic Imaging, 10 (1): 289-296 (2001)Biologically-Inspired Digital Architecture for a Cortical Model of Orientation Selectivity., , and . ICANN (2), volume 5164 of Lecture Notes in Computer Science, page 188-197. Springer, (2008)Processor arrays generation for matrix algorithms used in embedded platforms., , , and . ReConFig, page 1-6. IEEE, (2013)Spiking dynamic neural fields architectures on FPGA., , and . ReConFig, page 1-6. IEEE, (2014)Hardware/Software Codesign for Embedded Implementation of Neural Networks., , and . ARC, volume 4419 of Lecture Notes in Computer Science, page 167-178. Springer, (2007)A streaming architecture for Convolutional Neural Networks based on layer operations chaining., , , , and . J. Real Time Image Process., 17 (5): 1715-1733 (2020)Fault tolerance of self organizing maps., , and . WSOM, page 13-20. IEEE, (2017)On the Implementation of Central Pattern Generators for Periodic Rhythmic Locomotion.. ReConFig, page 422-426. IEEE Computer Society, (2009)Validating the existence of watermarks on digital images using a mobile phone., , and . ICITST, page 51-55. IEEE, (2012)On a Hybrid and General Control Scheme for Algorithms Represented as a Polytope., , , and . IPDPS Workshops, page 330-333. IEEE, (2011)