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Statistical thermal modeling and optimization considering leakage power variations.

, , , and . DATE, page 605-610. IEEE, (2012)

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Effective Wire Models for X-Architecture Placement., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (4): 654-658 (2008)Meaningful Shadows for Image Secret Sharing with Steganography and Authentication Techniques., , and . J. Inf. Hiding Multim. Signal Process., 5 (3): 342-352 (2014)Pulsed-latch-based clock tree migration for dynamic power reduction., , and . ISLPED, page 39-44. IEEE/ACM, (2011)X-architecture placement based on effective wire models., , and . ISPD, page 87-94. ACM, (2007)Statistical thermal modeling and optimization considering leakage power variations., , , and . DATE, page 605-610. IEEE, (2012)Pulsed-latch aware placement for timing-integrity optimization., , , and . DAC, page 280-285. ACM, (2010)Constraint graph-based macro placement for modern mixed-size circuit designs., , , and . ICCAD, page 218-223. IEEE Computer Society, (2008)PRICE: Power reduction by placement and clock-network co-synthesis for pulsed-latch designs., , , , and . ICCAD, page 85-90. IEEE Computer Society, (2011)Design-hierarchy aware mixed-size placement for routability optimization., , , , , and . ICCAD, page 663-668. IEEE, (2010)Exploring the Design Space of User-System Communication for Smart-home Routine Assistants., , , , , , , and . CHI, page 1-14. ACM, (2020)