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Energy efficiency via thread fusion and value reuse., , , , , and . IET Comput. Digit. Tech., 4 (2): 114-125 (2010)Frontend Frequency-Voltage Adaptation for Optimal Energy-Delay^2., , and . ICCD, page 250-255. IEEE Computer Society, (2004)On using network RAM as a non-volatile buffer., , , and . Clust. Comput., 2 (4): 295-303 (1999)CROB: Implementing a Large Instruction Window through Compression., , , , and . Trans. High Perform. Embed. Archit. Compil., (2011)Processor Microarchitecture: An Implementation Perspective, , and . Synthesis Lectures on Computer Architecture Morgan & Claypool Publishers, (2010)Integrating Adaptive On-Chip Storage Structures for Reduced Dynamic Power., , , , , , , and . IEEE PACT, page 141-152. IEEE Computer Society, (2002)Dynamic Frequency and Voltage Scaling for a Multiple-Clock-Domain Microprocessor., , , , , and . IEEE Micro, 23 (6): 62-68 (2003)Independent front-end and back-end dynamic voltage scaling for a GALS microarchitecture., , , and . ISLPED, page 49-54. ACM, (2006)Speculative hardware/software co-designed floating-point multiply-add fusion., , , , , , and . ASPLOS, page 623-638. ACM, (2014)Distributing the Frontend for Temperature Reduction., , , and . HPCA, page 61-70. IEEE Computer Society, (2005)