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Adapting Skip Connections for Resource-Efficient FPGA Inference., , , , , , , , and . FPGA, page 229. ACM, (2023)Exploiting the Expressiveness of Cyclo-Static Dataflow to Model Multimedia Implementations., , , , and . EURASIP J. Adv. Signal Process., (2007)S2N2: A FPGA Accelerator for Streaming Spiking Neural Networks., , and . FPGA, page 194-205. ACM, (2021)Systematic Address and Control Code Transformations for Performance Optimisation of a MPEG-4 Video Decoder., , , , and . ASP-DAC/VLSI Design, page 547-552. IEEE Computer Society, (2002)Communication Primitives Driven Hardware Design and Test Methodology Applied on Complex Video Applications., , , , and . IEEE International Workshop on Rapid System Prototyping, page 246-249. IEEE Computer Society, (2005)Memory Centric Design of an MPEG-4 Video Encoder., , , , and . IEEE Trans. Circuits Syst. Video Techn., 15 (5): 609-619 (2005)Trainable Preprocessing for Reduced Precision Neural Networks., , , , and . EUSIPCO, page 1546-1550. IEEE, (2021)Comparing Energy Efficiency of CPU, GPU and FPGA Implementations for Vision Kernels., , , , , and . ICESS, page 1-8. IEEE, (2019)ASLR: An Adaptive Scheduler for Learning Rate., , , and . IJCNN, page 1-8. IEEE, (2021)Using C-to-gates to program streaming image processing kernels efficiently on FPGAs., , and . FPL, page 626-630. IEEE, (2009)