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A 6.66-kHz, 940-nW, 56ppm/°C, fully on-chip PVT variation tolerant CMOS relaxation oscillator., , , , , and . ICECS, page 97-100. IEEE, (2012)A 0.21-V minimum input, 73.6% maximum efficiency, fully integrated voltage boost converter with MPPT for low-voltage energy harvesters., , , , , and . ESSCIRC, page 255-258. IEEE, (2014)A 24-transistor static flip-flop consisting of nors and inverters for low-power digital vlsis., , , , and . NEWCAS, page 137-140. IEEE, (2014)A fully-integrated, high-conversion-ratio and dual-output voltage boost converter with MPPT for low-voltage energy harvesting., , , , and . A-SSCC, page 1-4. IEEE, (2015)Leakage power reduction for clock gating scheme on PD-SOI., , , , and . ISCAS (2), page 613-616. IEEE, (2004)An area-efficient, 0.022-mm2, fully integrated resistor-less relaxation oscillator for ultra-low power real-time clock applications., , , , and . ISCAS, page 1-4. IEEE, (2017)An Error Diagnosis Technique Based on Clustering of Elements., , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 93-A (12): 2490-2496 (2010)A wide input voltage range level shifter circuit for extremely low-voltage digital LSIs., , , and . IEICE Electron. Express, 8 (12): 890-896 (2011)A Novel Layout Approach Using Dual Supply Voltage Technique on Body-Tied PD-SOI., , , , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 423-432. Springer, (2004)A 1.66-nW/kHz, 32.7-kHz, 99.5ppm/°C fully integrated current-mode RC oscillator for real-time clock applications with PVT stability., , , , , , and . ESSCIRC, page 149-152. IEEE, (2016)