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Signature analysis for analog and mixed-signal circuit test response compaction., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 17 (6): 540-546 (1998)Efficient multisine testing of analog circuits., , , and . VLSI Design, page 234-238. IEEE Computer Society, (1995)Low-cost and efficient digital-compatible BIST for analog circuits using pulse response sampling., , and . VTS, page 261-266. IEEE Computer Society, (1997)Low-cost DC built-in self-test of linear analog circuits using checksums., , and . VLSI Design, page 230-233. IEEE Computer Society, (1996)MIXER: Mixed-Signal Fault Simulator., , and . ICCD, page 568-571. IEEE Computer Society, (1993)DC Built-In Self-Test for Linear Analog Circuits., , and . IEEE Des. Test Comput., 13 (2): 26-33 (1996)Design for Testability and Built-In Self-Test of Mixed-Signal Circuits: A Tutorial., and . VLSI Design, page 388-392. IEEE Computer Society, (1997)Hierarchical fault modeling for analog and mixed-signal circuits., and . VTS, page 96-101. IEEE Computer Society, (1992)Hierarchical Statistical Inference Model for Specification Based Testing of Analog Circuits., , , and . VTS, page 145-151. IEEE Computer Society, (1998)Test Metrics for Analog Parametric Faults., and . VTS, page 226-235. IEEE Computer Society, (1999)