Author of the publication

Bubble Razor: Eliminating Timing Margins in an ARM Cortex-M3 Processor in 45 nm CMOS Using Architecturally Independent Error Detection and Correction.

, , , , , , and . IEEE J. Solid State Circuits, 48 (1): 66-81 (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Evaluation of predictive technology models., , , , and . Microelectron. J., (2018)Implementation of a 64-bit Jackson adder., , , , and . ACSSC, page 1149-1154. IEEE, (2013)Parallel high-radix Montgomery multipliers., , and . ACSCC, page 772-776. IEEE, (2008)Yield-driven minimum energy CMOS cell design., , , and . ACSCC, page 1010-1014. IEEE, (2012)MIPSfpga: using a commercial MIPS soft-core in computer architecture education., , , , , , , and . IET Circuits Devices Syst., 11 (4): 283-291 (2017)Inexpensive Student-Assembled FPGA/Microcontroller Board., and . MSE, page 101-102. IEEE Computer Society, (2005)A Compact Transregional Model for Digital CMOS Circuits Operating Near Threshold., , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (10): 2041-2053 (2014)Introduction to the Special Issue on the 2007 IEEE International Solid-State Circuits Conference., , , and . IEEE J. Solid State Circuits, 43 (1): 3-5 (2008)Implementation of 32-bit Ling and Jackson adders., , , , , and . ACSCC, page 170-175. IEEE, (2011)Energy-delay tradeoffs in 32-bit static shifter designs., , , , , and . ICCD, page 626-632. IEEE Computer Society, (2008)