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Vector Unit Architecture for Emotion Synthesis., , , , , , , , , and 4 other author(s). IEEE Micro, 20 (2): 40-47 (2000)Predicting missing links in social networks with hierarchical dirichlet processes., , , and . IJCNN, page 1-8. IEEE, (2012)A single-chip MPEG-2 codec based on customizable media microprocessor., , , , , , , , , and 5 other author(s). CICC, page 163-166. IEEE, (2002)300MHz design methodology of VU for emotion synthesis., , , , , , , , , and 4 other author(s). ASP-DAC, page 635-640. ACM, (2000)2.44-GFLOPS 300-MHz floating-point vector-processing unit for high-performance 3D graphics computing., , , , , , , , , and . IEEE J. Solid State Circuits, 35 (7): 1025-1033 (2000)The MINC (Multistage Interconnection Network with Cache Control Mechanism) Chip., , , and . ASP-DAC, page 337-338. IEEE, (1998)Performance evaluation of SNAIL: A multiprocessor based on the simple serial synchronized multistage interconnection network architecture., , , , , and . Parallel Comput., 25 (9): 1081-1103 (1999)An LSI implementation of the simple serial synchronized multistage interconnection network., , and . ASP-DAC, page 673-674. IEEE, (1997)A single-chip MPEG-2 codec based on customizable media embedded processor., , , , , , , , , and 6 other author(s). IEEE J. Solid State Circuits, 38 (3): 530-540 (2003)