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A Power-Aware Placement and Routing Algorithm Targeting 3D FPGAs., and . J. Low Power Electron., 4 (3): 275-289 (2008)Systematic methodology for exploration of performance - Energy trade-offs in network applications using Dynamic Data Type refinement., , , , , , and . J. Syst. Archit., 53 (7): 417-436 (2007)Exploration of GPU sharing policies under GEMM workloads., , , , and . SCOPES, page 66-69. ACM, (2020)BLonD++: performance analysis and optimizations for enabling complex, accurate and fast beam dynamics studies., , , and . SAMOS, page 123-130. ACM, (2018)Automated Physics-Derived Code Generation for Sensor Fusion and State Estimation., , , and . CoRR, (2020)FPGA Acceleration of Approximate KNN Indexing on High- Dimensional Vectors., , and . ReCoSoC, page 59-65. IEEE, (2019)Memory power optimization of hardware implementations of multimedia applications onto FPGA platforms., , and . J. Embed. Comput., 1 (3): 353-362 (2005)A Framework for Interconnection-Aware Domain-Specific Many-Accelerator Synthesis., , , , and . ACM Trans. Embed. Comput. Syst., 16 (1): 8:1-8:26 (2016)A Message-Passing Microcoded Synchronization for Distributed Shared Memory Architectures., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (5): 975-979 (2019)Fast Operation Mode Selection for Highly Efficient IoT Edge Devices., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (3): 572-584 (2020)